Embedded System Questions and Answers Part-19

1. Which package has high memory speed and change in the supply?
a) DIP
d) zig-zag

Answer: c
Explanation: DIMM is a special version of SIMM which is 168-bits wider bus and looks similar to a larger SIMM. The wider bus increases the memory speed and change in supply voltage.

2. Which is a subassembly package?
a) dual-in-line
b) zig-zag
c) simm
d) ceramic shell

Answer: c
Explanation:The SIMM is basically a subassembly, not a package. It is a small board which possesses finger connection on the bottom and sufficient memory on the board in order to make up the required configuration.

3. What is the required voltage of DIMM?
a) 2V
b) 2.2V
c) 5V
d) 3.3V

Answer: d
Explanation: For increasing the speed and reducing the power consumption, it is necessary to reduce the power supply. Today’s CPUs and memories have 3.3V supply or even lower instead of the signal level from 0 to 5V. DIMMS are described by its voltage, speed, and memory type respectively as 3.3V 133MHz SDRAM DIMM.

4. Which memory package has a single row of pins?
b) DIP
c) SIP
d) zig-zag

Answer: c
Explanation: The Single-in-line package is the same as that of SIMM, in which the finger connections are replaced by a single row of pins. SIP took the popularity of SIMM but nowadays it is rarely seen.

5. What is the access time of MCM51000AP10?
a) 100ns
b) 80ns
c) 60ns
d) 40ns

Answer: a
Explanation: The access time of memory is defined as the maximum time taken by the chip to read/write data and it is very important to match the access time to the design. For example, MCM51000AP10 have 100ns access time for the memory.

6. In which pin does the data appear in the basic DRAM interfacing?
a) dout pin
b) din pin
c) clock
d) interrupt pin

Answer: a
Explanation: In the basic DRAM interfacing, the higher order bits asserts the RAS signal and the lower order bits asserts the CAS signal. When the access got expired, the data appears on the dout pin and is latched by the processor

7. What is the duration for memory refresh to remain compatible?
a) 20 microseconds
b) 12 microseconds
c) 15 microseconds
d) 10 microseconds

Answer: c
Explanation:The memory refresh is performed every 15 microseconds in order to remain compatible.

8. Which interfacing method lowers the speed of the processor?
a) basic DRAM interface
b) page mode interface
c) page interleaving
d) burst mode interface

Answer: a
Explanation: The direct method access limits the wait state-free operation which lowers the processor speed.

9. What is EDO RAM?
a) extreme data operation
b) extended direct operation
c) extended data out
d) extended DRAM out

Answer: c
Explanation: EDO RAM is a special kind of random access memory which can improve the time to read from the memory on faster microprocessors. The example of such a microprocessor is Intel Pentium

10. What is RDRAM?
a) refresh DRAM
b) recycle DRAM
c) Rambus DRAM
d) refreshing DRAM

Answer: c
Explanation: Rambus DRAM is a synchronous memory developed by Rambus. It can replace SDRAM and is useful in high bandwidth applications.